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Patent Issued for Semiconductor Device and Method of Forming Anisotropic Conductive Film between Semiconductor Die and Build-Up Interconnect…

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by April 20, 2017 General

Patent Issued for Semiconductor Device and Method of Forming Anisotropic Conductive Film between Semiconductor Die and Build-Up Interconnect Structure (USPTO 9620455)

By a News Reporter-Staff News Editor at China Weekly News — From Alexandria, Virginia, VerticalNews journalists report that a patent by the inventors Pagaila, Reza A. (Singapore, SG); Lin, Yaojian (Singapore, SG); Koo, Jun Mo (Singapore, SG), filed on June 24, 2010, was published online on April 11, 2017.

The patent’s assignee for patent number 9620455 is STATS ChipPAC Pte. Ltd. (Singapore, SG).

News editors obtained the following quote from the background information supplied by the inventors: “Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).

“Semiconductor devices perform a wide range of functions such as high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.

“Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows its electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.

“A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.

“Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual die from the finished wafer and packaging the die to provide structural support and environmental isolation.

“One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller die size may be achieved by improvements in the front-end process resulting in die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials.

“In a fan-out wafer level chip scale package (FO-WLCSP), a semiconductor die is commonly mounted to a temporary carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed to expose the semiconductor die, and a build-up interconnect structure is formed over the exposed semiconductor die.

“The semiconductor die is known to vertically and laterally shift during encapsulation which can cause misalignment of the build-up interconnect structure. One technique of securing the semiconductor die to the carrier to reduce die shifting involves forming wettable pads over the carrier and securing the semiconductor die to the wettable pads with bumps. The formation of wettable pads typically involves photolithography, etching, and plating, which are time consuming and costly manufacturing processes. The wettable pads and bumps increase interconnect resistance between the semiconductor die and build-up interconnect structure. Moreover, the gap between semiconductor die and carrier must be sufficiently high to achieve a uniform underfill around the bumps without forming voids. The gap has the undesired result of increasing package thickness. The gap also increases the bump size which increases bump pitch and reduces input/output (I/O) count.”

As a supplement to the background information on this patent, VerticalNews correspondents also obtained the inventors’ summary information for this patent: “A need exists to reduce die shifting during encapsulation while providing a low resistance electrical interconnect between the semiconductor die and build-up interconnect structure. Accordingly, in one embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a semiconductor wafer having a plurality of semiconductor die with bumps formed over contact pads on an active surface of the semiconductor die, depositing an ACF over the bumps and active surface of the semiconductor wafer, singulating the semiconductor wafer to separate the semiconductor die, providing a temporary carrier, mounting the semiconductor die with the ACF oriented to the temporary carrier, compressing the ACF under the bumps to form an electrical interconnect to the bumps, depositing an encapsulant over the semiconductor die and temporary carrier, removing the temporary carrier to expose the semiconductor die, and forming an interconnect structure over the exposed semiconductor die and encapsulant. The interconnect structure is electrically connected through the compressed ACF to the bumps.

“In another embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a semiconductor die with bumps formed over contact pads on an active surface of the semiconductor die, depositing an ACF over the bumps, providing a carrier, mounting the semiconductor die with the ACF oriented to the carrier, compressing the ACF under the bumps, depositing an encapsulant over the semiconductor die and carrier, removing the carrier to expose the semiconductor die, and forming an interconnect structure over the exposed semiconductor die and encapsulant. The interconnect structure is electrically connected through the compressed ACF to the bumps.

“In another embodiment, the present invention is a method of making a semiconductor device comprising the steps of providing a semiconductor die with contact pads, providing a carrier, mounting the semiconductor die to the carrier with an ACF between the semiconductor die and carrier, compressing the ACF under the contact pads, depositing an encapsulant over the semiconductor die and carrier, removing the carrier to expose the semiconductor die, and forming an interconnect structure over the exposed semiconductor die and encapsulant. The interconnect structure is electrically connected through the compressed ACF to the contact pads of the semiconductor die.

“In another embodiment, the present invention is a semiconductor device comprising a semiconductor die with contact pads. An ACF is formed over the semiconductor die. A portion of the ACF is compressed to form an electrical connection to the contact pads. An encapsulant is deposited over the semiconductor die. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected through the compressed ACF to the contact pads.”

For additional information on this patent, see: Pagaila, Reza A.; Lin, Yaojian; Koo, Jun Mo. Semiconductor Device and Method of Forming Anisotropic Conductive Film between Semiconductor Die and Build-Up Interconnect Structure. U.S. Patent Number 9620455, filed June 24, 2010, and published online on April 11, 2017. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9620455.PN.&OS=PN/9620455RS=PN/9620455

Keywords for this news article include: Asia, Singapore, Electronics, Semiconductor, STATS ChipPAC Pte. Ltd..

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